Course Modules
- Introduction and Working knowledge of UNIX/LINUX commands.
- File handling skills in UNIX/LINUX.
- Introduction to programming languages used in IC-Design.
- MOSFET Operation, stick diagram, IC fabrication process.
- Formation of Digital (NAND, AND, OR, NOR, etc.) logic using CMOS.
- Characterization of Digital standard cells and Library file information.
- Technology File information, LEF file information, QRC Tech file process.
- Basics of RTL coding and RTL languages like Verilog, VHDL, System Verilog.
- Inputs and Outputs understanding.
- Constraints development and understanding.
- Optimization techniques (uniquify, preserve, flatten).
- DFT basics.
- Low power implementation techniques.
- Sanity checks like check Design, lint report.
- Derive environment features: Generic, map, incremental.
- Wire load model, PLE, Physical, Spatial.
- Inputs and outputs understanding.
- Intent and comparison understanding.
- Basic understanding of transition/slew, capacitance, leakage power, internal power, and On-Chip Variation (derate, AOCV, LVF).
- Library file differences: NLDM, CCS, ECSM, LVF.
- Timing concepts understanding: setup, hold, recovery, removal, pulse width, clock gating check.
- PLL jitter understanding and uncertainty calculations.
- IO budgeting.
- Different Timing Modes understanding.
- ECO generation.
- Floorplanning concepts and IO placement.
- Power planning.
- Placement strategies: region, fence, blockages, padding, bump, don't touch, filler gap.
- DRV optimization, Buffer tree synthesis.
- Clock tree synthesis and clock latency calculations.
- Routing design and optimization.
- Antenna.
- ECO Timing closure and implementation cycle.
- Design Rule Checks understanding and importance.
- Layout Versus Schematic and difference with respect to LEC.
- Electrical Rule Checks.
- IR Drop analysis - Static and Dynamic.
- Industry Standard Physical Design Live Project.
- Mock interviews to simulate real job interviews.
- Personality improvement sessions to enhance soft skills and confidence.